TPMP (Thermo-regulated power management platform) measures power on a DUT and regulates temperature of the DUT. It is also a framework that controls the test environment parameters and make tests repeatable.
They built a TPMP around an i.MX8M EVK as DUT. The power measurement is based on Baylibre ACME. It allows to probe up to 16 channels. For example, the power going into the target is measured, as well as separate parts. The thermoregulator uses Peltier elements and a big fan. It can heat and cool. The regulator is a TEC-1091. Die temp is read from sysfs on the DUT itself. The control elements (thermoregulator, power measurements) are linked to a PC over USB.
Baylibre ACME is a BBB cape with 8 probes. 2 can be stacked to get 16 probes. The jack probe measures the entire board, but can also be used for powercycling.
The test framework is a collection of Python modules and scripts.
Communication with the DUT is always over serial, so it can handle Linux and Android similarly.
Infrastructure for running one test, and also infrastructure for several tests and collecting results. This is currently all fully custom. They plan to move to a more standard framework: LAVA and LISA so it fits into kernelci. acme_cape is already supported, the idea is to add a plugin for thermoregulation.
Compared to other products (ovens etc.), this TPMP is a lot cheaper and smaller. The only disadvantage is that it can’t go lower than 10̊ C. And advantage though is that the probes are not heated up, so measurements are more accurate without compensation. The TPMP is really meant to heat up the SoC itself. For measuring an entire embedded system, an oven may be more appropriate. Alternatively, the head spreader in the TPMP can be adapted to cover a more appropriate surface.
Process variations make that some chips that are produced are faster or heat up more. In general, fast chips also consumer more power and have a higher temperature. Since in the end the chip always runs at the same speed (that of the slowest that is still accepted), the slow chips are actually “better” because they consume less. In other words, the worst case are the fast and hot chips. The temperature is also a vicious cycle, because the power consumption increases at high temperature.
For example, the consumption of the SoC is 250mW at 25̊ C, but 700mW at 95̊ C. Therefore, if you want to do relevant power measurements, you have to do them under temperature control. For the process, the only thing you can do is to make a farm with several samples (fast, slow, typical).
Low temperature is still a problem: the Peltier element can’t do it, but also moisture starts to seep in.
The device is still very custom. It takes two days to build a TPMP.
It ended with a quiz where the author of this article gave the most best answers :-)